Texas Instruments has FRAM in some of their microcontrollers. It's really pleasant to use. You write to it like any other part of RAM, the only difference being that the bytes stay where they are when you lose power. With something flash you need to be more careful with how you use it.
I've been using it in a few projects at work as a replacement for flash backed serial RAM. It drops right in, as it is pin and function compatible with other small SPI and I2C nvram and eeprom chips, and isn't really much more expensive in small capacities.
I really like their FRAM products too. Ultra low power, high data endurance. They have this NFC FRAM MCU product that can be powered by the reader itself.
I want someone to incorporate these into their hardware wallet products. Would also be very cool for high endurance data storage. I understand we are talking about kilobytes of storage but still they have very small packaging anyway, just use them (the SPI bus FRAM products) by the dozens.
Ya...the TI MSP430 had (have) it. Nifty 16-bit arch (esp if you like PDP-11s) and FRAM was just as you say a joy to use versus Flash. Very low power as well.
Holy cow thats cool. So It's like an expensive nonvolatile replacement for volatile memory. I wonder if in the future there could be computers with no sense of "memory vs storage", that it would all just be a single contiguous "memory".
Instead of turning off the computer and hibernating, you just turn off the LCD backlight and the IO.
While implemented virtually rather than physically, two well-known (and very different) examples of systems that unify memory and secondary storage under a single addressing scheme are Multics (1969) and the IBM System/38 (1978).
Note that the present-day IBM i née AS/400 is a direct descendent of the System/38.
I'm not sure what the performance/persistence implications of this (FRAM) actually are...
But to your point, simply copying the processor state to a known location in FRAM (0xFFFFFFF0) and having the start routine read state from that location seem like a very low overhead solution to the problem.
How long would it really take to do something your computer does as part of preemptive multi-tasking? Nanoseconds? Milliseconds? We are talking about $order(hundred) of instructions
This may work on something with the complexity of a microcontroller or SoC, but becomes tricky beyond that. Any peripherals, especially removable ones would still need to be rediscovered and reinitialized on boot. Network connections may have died/reset while the system was off.
Essentially, this scheme has all the major complications of resuming from sleep/hibernation in practice.
I did notice from the article that reading is destructive, so every time you read (or at least every time you read a 0), you have to re-write it out. I wonder how much that affects the practical durability.
Yes, since reads destroy the data, each read causes a write. The chip will handle 100 trillion read/writes. So yes, the chip will wear out rapidly if you do a lot of reads.
I can't really think of a use case where this could plausibly come up. It would take 3 years if you read the same memory location (uncached) 1 million times a second.
There are multiple factors that limit the number of writes that FRAMs can handle: changes in crystal structure as Ti ions replace O, mobile ions collecting at grain boundaries, and something to do with 90º domains.
Reading destroys the stored value; it doesn't necessarily destroy the physical material.
Reading from memory is already destructive in DRAM (capacitor gets discharged), magnetic core memory (need to alter the magnetization state to read out how much energy was needed), and probably other technologies as well.
For the specific chip I used (MSP430FR2355), you could read and execute code at max 8MHz without wait states. Which means it's reading at most 4MHz since each MSP430 instruction that accesses memory requires at least 2 cycles. So latency is at least 1/4MHz=0.25µs
Just musing around the word Ferroelectric, I was expecting perhaps something related to iron in the PZT but it's lead, zirconium, titanium, and oxygen. So I learned that Ferromagnetic simply means "iron-like magnetic" and that ferroelectric was coined by analogy to the hysterisis curve of ferromagnets in a magnetic field (MH curve) but in ferroelectric it's an electric field (P-E curve).
These saved me from a redesign 25 years ago. I had an 8051 with 256 bytes of RAM and a serial EEPROM with limited writes. Replacing the EEPROM with a serial FRAM allowed me to increase the effective RAM. I had to do some tweaking and figuring because it was so much slower. Also, FRAMs had limited writes AND reads, but on the order of billions instead of millions. Billions of reads are a lot, but you still had to be careful.
FRAM seems great and I wonder why it's not used more. TI has some MSP430 processors that include it, but when they went to the MSP432 (ARM architecture), they said something about a process incompatibility. Some ARM or Risc-V processors with FRAM would be great.
Any idea what the process issue is? Would you say FRAM is on the decline? Super low powered CMOS ram used to also be a thing, but I haven't seen that in a while either.
Added: article mentions flash memory is $15/gbit. I guess that is NOR flash? NAND is way way cheaper, more like $15/terabit.
Another question: is it reasonable to say that FRAM automatically implements secure erasure? Like if you overwrite a cell, can you be sure that the old contents are gone? With flash, you have to worry about stuff like sector remapping other the covers.
TI MSP430FR5969 development board: https://www.ti.com/tool/MSP-EXP430FR5969
That is a fancy MSP430 processor with 64KB of FRAM and 2KB of regular ram. The board is $16. The regular ram is I think a little bit faster than the FRAM and good for "infinite" write cycles instead of mere trillions, so I guess you need both. They have a few more of these boards including one with 128KB of FRAM if I remember right.
The metal ions from the ferroelectric material can contaminate the silicon production line. I read that they would manufacture the silicon die at one facility (i.e. make the transistors) and then do the rest of the fabrication (the ferroelectric material, top metal, etc.) at another facility to avoid contamination. Maybe that's the process incompatibility that you mentioned. I don't know if FRAM is on a decline or will hold on as a niche product.
It's also a pretty good debug tool: you can log a trace into a circular buffer in it more or less continuously, then dunno or the contents after a crash or some other failure.
Hmm, thanks, I'm surprised those MSP430 cpus aren't more expensive if their fabrication is that complicated. So it sounds like the ARM designs (I guess basically hard macros from ARM Ltd.?) aren't compatible with that type of process. I wonder if a RISC-V design starting with downloaded HDL would be easier. I hope it happens: FRAM is really cool in concept and I've had a few application ideas where it would be great.
I've been wondering if the MSP430's are a single die with the FRAM and the µC on the same process, or if they're co-packaging a "standard" FRAM die made elsewhere.
minor correction: the central atoms in pzt are not zircon but zirconium. zircon is zirconium silicate, the form in which zirconium is almost always found in nature. there is no silicate in pzt
also, the atom that can substitute for zirconium in that central position is not lead but titanium. you do explain this in the following sentence, but first you say 'causes the lead or [zirconium] atom to physically move', which is wrong
I did my PhD on a purported successor to this - rather than using magnetic bubbles the idea was to use things called Skyrmions which emerge naturally in some materials as either information carriers or to store data in place. In practice it’s never really been taken up by industry for a few different reasons (density, can’t move the skyrmions in a straight line with a current, difficult to read whether one exists or not in a specific place).
Someone gave me a board with bubble memory chips to examine, but when I opened up the chip it turned out to be regular DRAM; they were mistaken about the type of memory.
Which bubble "chips" would someone confuse with dram? All the Intel, TI, Hitachi and Russian ones I've ever seen are relatively large, square, thick and decidedly un-DRAM like.
I have several working bubble memory boards. You can't take them apart. :-)
This was an IBM board so all the chips were in large, square, metal packages. These packages are descendants of the SLT modules used in the System/360.
Oh wow I’d never heard of bubble memory before. That’s crazy.
The (in retrospect) strange and complicated things people came up with to store bits before magnetic core got popular and then later silicon wiped the field are so much more interesting than what we’ve got now.
I get why silicon won. But it’s just nowhere near as fun as bubble memory, delay lines, or CRTs.
I know. I saw the bubble memory was used in the 70s and maybe even 80s, which is long after the days of core memory being becoming common.
And I know DRAM isn’t exactly simple.
But it just doesn’t feel as neat to me as pushing bubbles around or using a transducer to put a wave through mercury or other delay line. Or drawing a “picture of memory” for no one on a CRT because that _is_ your memory.
If one of those had won and was what everyone was used to, I’m probably think they were old hat and DRAM was crazy and cool. But that’s not how history worked out.
There is not that much complexity (circuit-wise) in the DRAM array itself apart from the fact that the sense amplifier is essentially an SRAM cell and not really an “amplifier”. Another layer of ridiculous complexity is how to interface that to the outside world without spending the precious die area of DRAM optimized process for complex interface logic or PHYs, so you get the only high-speed single ended parallel bus with weird voltage levels interface that is used in modern computers.
the dram array is pretty simple, it's true, but its behavior isn't, and the circuitry around the edges to make it act like ram isn't. you have the sense amplifiers with their inputs that are also their outputs, yeah, but also precharge, refresh, and stuff i'm not privy to
I've always wondered if the ROMs on my VAXstation 4000/90a are ferroelectric. The DEC manuals refer to it as flash ROM, but I've also heard / read it referred to as FRAM, although I couldn't say I remember where or when.
But 512KB of FRAM at $3 per megabit would make that pricier than the machine! So I wonder what it has in it instead.
It wouldn't make sense to use FRAM for ROM, since the big feature of FRAM is fast write speed. I found one DEC document that says the Flash ROM on one product is the Intel 28F008SA, an 8Mb flash chip. So I expect the VAXstation uses boring flash too, rather than costly FRAM.
There are multiple factors that limit the number of writes that FRAMs can handle: changes in crystal structure as Ti ions replace O, mobile ions collecting at grain boundaries, and something to do with 90º domains.
Are the parts pin-compatible with parallel sram? I've always thought it would be nice to replace the battery-backed SRAM in old video game cartridges with MRAM or FeRAM
I’ve replaced battery backed SRAM in several game consoles and other devices with FRAM (Neo Geo CD, Sega Saturn, an HP oscilloscope) and for some it’s drop-in, and in a few you have to bodge some lines.
Won’t that negatively impact the life expectancy of the device? FRAM is rated for trillions of reads and, if the SRAM is frequently read, a trillion reads isn’t that much.
>100 trillion reads per location over 30 years still means you gotta read locations at over 100 kHz 24/7. Not good enough for main memory, sufficient even for frequently accessed configuration values.
Yes. It'd be a problem for running code directly from it - it'd be better to cache it to DRAM so that all reads would come from DRAM and only writes would make it to FE-RAM.
IIRC, it was a common trick with 286 and 386 PCs, because BIOS ROMs were 8-bit wide and shadowing the BIOS in RAM made it much faster.
The FM1808B and FM1608B might work for you. These are 32Kx8 and 8K×8 FRAM chips with standard SRAM pinouts, in DIP packages. If you don't need a DIP, you have a lot more choices.
The SOIC look like they could work as-is in a gameboy, which (thanks to Pokemon) is the most common request for replacing batteries. The DIPs could be made to work in most NES games too, I suspect.
From looking at various patents, I believe they put down a layer of PZT and then etch it into cubes with photolithography. Look at the process diagram at the bottom of my article, step 1128.
I've been using MRAM instead as soon as I read that the way FRAM works internally is that every read is actually destructive and but written right back after the read.
I don't want that in something that's meant to replace a mask rom.
I designed in a Everspin MRAM. Had to take it back out when we learned that the small magnet, to activate a reed switch, near the MRAM would destroy it. It did not just lose a few bits, the device was forever dead. We are talking Refrigerator Magnet level field in close proximity.
Great technology as long as no magnetic fields are close to the device.
Everspin claims to be internally shielded for between 25 to 125 gauss depending on the temperature rating and package type (pdf included above).
In my case using the parallel interface and TSOP-II package, the Industrial version is the best and is supposed to resist up to 125 gauss.
And a fridge magnet is around 100 gauss (obviously they vary widely but I found a random chart that placed fridge magnet at 100).
Also magnetic fields drop off with an inverse-cube law so even a small distance drastically weakens the field. So in many applications with a chip inside of some product like a vintage computer, the chip is likely to be at least an inch away from any exterior surface, and often a magnet or coil will also be inside of some other enclosure like a speaker, adding yet more inches of distance. So even the commercial version at only 25 gauss shielding is probably fine in most cases.
In my application above it's a thin card with essentially no distance from the exterior to the chip, so any bare exposed magnets like a fridge magnet, or the pretty strong magnet in the base of a flash light right on my desk here, can easily come to within 1mm from the chip.
If the shielding claims are true then at 125 gauss the card should be ok even with a mild magnet laying right on the card. Setting on top of something like a speaker should be fine since the speaker magnet is suspended in the center of a box. But I still have to generally avoid magnets or electromagnets. Maybe it can stand up to my fridge magnets, but that flashlight is quite a bit stronger.
If you are designing a pcb and can make changes and have room, a common steel rf shield should help a lot as long as it's made of mostly iron or nickel. mu-metal is best but a common plain steel shield should be almost as good since steel is mostly iron. They do sell them in generic form not just custom made: https://www.digikey.com/short/zm42wjmc
And they are expensive. I have an external memory card for a vintage portable word processor that the full bom ends up about $100 for 512k to build one, and something like over $30 of that is just the mram.
I remember there being some document in which TI describes how this is done atomically at a physical level so there is no way that you can end up losing power and having the read-triggered write fail to complete.
FRAM is like magnetic core memory in many ways, but the underlying principle is completely different: it is ferroelectric rather than ferromagnetic. And the materials are completely different.
