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I can never remember what xnm means as it varies between companies.

In this case,

Samsung's 3nm = Intel's 7nm

I am still waiting for a standard based on transistor density numbers!




It should be ahead of Intel 4 ("4nm"). Samsung 5nm density is approximately 127M gates/mmsq on paper. Samsung 4nm will scale to around 0.75x area according to their China conference earlier this year, to a transistor density of around 168M gates/mmsq. They had another conference the other day detailing 3nm, which will scale down another 25%, to around 224M gates/mmsq.

Intel 4 was estimated to be up to 200M gates/mmsq. I don't think we have exact numbers since Intel only released numbers for their previous 10nm plan, which were heavily revised for Tigerlake iirc. I think Intel 3 is a variant of Intel 4 so 3GAA will presumably be similar to Intel 3.

edit: slides of the 3nm conference yesterday https://twitter.com/stshank/status/1445924295121592321/photo...


gates/mmsq seems a way more usuable metric then the nm marketing stuff?


It's a better ballpark, but it's still an ideal number measured by the manufacturer using their own tests. Problem is, companies rarely if ever source the exact same design to multiple foundries, so it's not easy to compare in practice.


Intel actually renamed their nodes in like with Samsung and TSMC, so Intel 7 (used to called 10nm) is roughly comparable to TSMCs 7nm and Samsungs 8nm


For anyone who had not been aware (like me), apparently Intel has renamed their third gen 10 nm process to 7, and their 7 nm process (the one that they describe as being their first full use of EUV, that got pushed back to 2023) is now named 4. That puts Intel’s node naming roughly in line with TSMC and Samsung in terms of feature density.


there was a restaurant, a&w I think, which had a 1/3lb burger. a whole bunch of people thought it was a ripoff - smaller than a quarter pounder. As it's impossible to explain to the masses that they need to repeat 3rd grade, the restaurant gave up on the idea.

then there was windows. have you actually heard an elite hipster tell you, a professional highly paid tech guy, that mac is superior because windows is behind on operating systems? not because unix is better. no, because windows was "8" and mac was "10." X is the roman numeral for "10" you see, and 10 is a later version than 8. So ms ended up skipping windows 9.

There was a defined standard for process sizes. A bunch of unethical marketing scammers used half-truths to scam people. It worked, because people can't even figure out a hamburger. And now the people who followed the long-established standard have to switch to the scammer's standard, because they still need that hamburger guy's money.

Here's the problem with customers... You need their money.


It doesn’t relate to any measurement of feature size. It’s just a frustratingly meaningless marketing term.


Why do we keep using it?! It’s so unscientific that it embarrasses me that intelligent people even talk about it.


Fabs have been increasing transistor performance without shrinking the size much; for example, a 22 nm FinFET has similar performance to a 14 nm planar FET so feature sizes don't tell you as much as they used to. This led fabs to invent "effective" feature sizes to convey improvements in the process.


It’s basically like a version number now I suppose.


>I can never remember what xnm means as it varies between companies.

Intel has renamed their node so the industry has now pretty much standardise on naming. Where all 3nm from Samsung, TSMC and Intel will have similar transistor density. ( But not similar performance or any other characteristic )

Officially Intel doesn't use 4nm or 3nm, they call it Intel 4 or Intel 3. But for the sake of easier comparison most people still use Intel 4nm to describe it.


There is also a big difference between the nm accuracy of lithography and the transistor size.

Creating chips with an accuracy of 1nm does not mean 1nm transistors.

But 1nm sounds good as marketing.




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