Rigel (https://rigel.crhc.illinois.edu/) is one such project, though the silicon implementation is decidedly less far-along than AsAp. The goal there is 1024+ cores in 45nm. The targeted applications are more like "things that are massively parallel but don't run well on GPUs" than "DSP kernels that decompose into pipelines", but they are both accelerators nonetheless. A more detailed paper on the architecture itself can be found here: https://netfiles.uiuc.edu/jkelm2/www/papers/kelm-isca2009.pd... .

Full Disclosure: I am affiliated with this project. However, I am making no claims about the relative merits of AsAp and Rigel, just pointing out another manycore research project.

Also, you may be interested in commercial chips from Cavium (http://www.cavium.com/OCTEON_MIPS64.html) and Azul Systems (http://www.azulsystems.com/products/compute_appliance.htm). Of course, modern GPUs and Intel's forthcoming Larrabee are manycore chips as well, though GPUs have some restrictions and special-purpose hardware that makes them slightly less general than others.