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The barrier to entry is low, now, and getting lower.

Prototyping your custom instruction sets on FPGAs and then commissioning a run to stamp them to ASICs isn't prohibitively expensive, or hard.

In part, it's lack of imagination that has led us so far down the complicated, twisty path into x86 hell.

Just because your chip can do it doesn't mean it's good at it.




This is very interesting. I always thought that making an ASIC was prohibitively expensive except for the largest companies. How much does it really cost?

I would really enjoy playing with a Lisp chip. It might not be good for performance computing, but it would be great for writing GUIs. The paper suggests having a chip with a Lisp part for control and an APL part for array processing - I think the modern equivalent would be a typed-dispatching part for control and some CUDA or OpenCL cores for speed.


> I always thought that making an ASIC was prohibitively expensive except for the largest companies. How much does it really cost?

Full custom is still quite expensive.

But you can go the route I'm talking about (prototype on an FPGA, then get in on one of the standard runs at a chip fab via MOSIS or CMP or a similar service) for ~10,000 USD for a handful of chips.


I'm sensing some kind of universal price point for bleeding edge fabrication.

Adjusting for time, etc. that's pretty what in cost in 1991 to have a handful of custom boards and firmware built about the TI DSP chips of the day in order build a dedicated multichannel parallel siesmic signal processing array for marine survey work.




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