Why don't we have tagged memory in today's architectures? Is nobody getting inspiration from the LISP machine or Burroughs (https://en.wikipedia.org/wiki/Burroughs_large_systems) architectures? Is it because of the failed Intel iAPX 432?
Languages that need tagged memory can implement this in software, and on current arch they will still run as fast as in a CPU that had that trick implemented in hardware. More likely faster, because the software solution enables much greater flexibility (e.g. look at Javascript VMs, they have various ways to represent values, and that's a single language). Also because compilers can often optimize out all value-representation overheads (by unboxing etc.). Stuff implemented in the CPU decoder (or even in microcode) can never afford to make that level of optimization.
PowerPC AS has the 65th bit but you can't use it. I suspect people would be unable to agree on the details such as the size and semantics of the tags. And of course your RAM would cost 10% more.
