> Today I bump into limitations of machines that were put there by manufacturers who are trying to assert ownership of the device after the purchase. In the "before times" limitations were either a fact of the hardware (i.e. you only have so much RAM, storage, CPU cycles, etc) or of your own ability (you don't know how to crack the protection, defeat the anti-debug tricks, etc). Today you're waging a nearly unwinnable battle against architectures of control baked-in to the hardware at a level below a level that the average end user has any hope of usurping.
Even in the "before times" we had such limitations: the 486 was shipped as a cheaper version with a functional but disabled math coprocessor. There are meaningful differences in practical terms, but I definitely see it as a clear predecessor of this behavior.
Binning products into segments is different than blowing e-fuses. When I bought a 486SX I got a 486SX. It remained forever what it was when I bought it.
In a hypothetical scenario where I somehow "unlocked" the FPU functionality Intel couldn't push out a mandatory firmware upgrade to blow an e-fuse in my chip, fixing the "vulnerability" that allowed me to access the FPU and simultaneously preventing me from ever loading "vulnerable" firmware again (like, say, the Nintendo Switch).
That's different. Lithography masks are expensive. It's cheaper to make them once and use them for different models of the same chip than to make a separate set for each model. My understanding is that in this particular case they would sell the FPU-less version below the cost and the full one with some markup.
In modern times they also do this because the process of semiconductor manufacturing is imperfect and sometimes some parts of the chip would come out damaged. IIRC this happens with GPUs a lot so they tend to have spare cores.
IIRC later revisions of the 486SX have a unique mask set without the FPU, presumably the higher chips per wafer made up for the extra tooling costs.
Also, as a note, unlike modern chips where they fuse off broken cores and sell them as lower specs[1] as part of the binning process, with the early 486SX the FPU was disabled before any testing / binning, so they weren’t selling broken DX dice as SXs.
[1] Or in some cases, fusing if working silicon if the supply / demand curve works that way, see the infamous 3 core AMD Phenom.
Even in the "before times" we had such limitations: the 486 was shipped as a cheaper version with a functional but disabled math coprocessor. There are meaningful differences in practical terms, but I definitely see it as a clear predecessor of this behavior.