No I think he literally means IR losses. ie voltage droop V=IR

Modern VRMs also reduce output voltage when the CPU draws more current. That way when the CPU later draws less current, the voltage doesn't inductively spike up and damage the CPU. Overclockers call this LLC (load line calibration), but don't google that because electrical engineers don't use that term and most articles and reddit threads explain this ass-backwards. Google "Active Voltage Positioning" instead to find correct documentation.

If your VRM is close to the chip, voltage droop will be ~0 and LLC can be ~0. This allows you to undervolt more and save power without instability. This is probably why most server CPUs have voltage conversion inside the chip (FIVR, Fully integrated voltage regulators)

Yup, all of what you said is correct.

Which would reduce heat and therefore make it easier to cool in a small form factor.

The heat dissipated on traces is significant, but not that significant.