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The memory is not inside the package any more than on any other flip chip or pop soc, ie every mobile ap soc made in the past 5 years. Please stop propagating this myth.

One of Apple's actual secret sauces is they can make their big caches fast. Typically latency increases with cache size so it's a tradeoff. Apple trades off less here. And it's not some "only fast because tsmc" it's just really solid engineering at both the architectural and physical design level.




The Apple reality distortion field is in full swing:

"The memory is not inside the package"

vs.

"The SoC and RAM chips are mounted together in a system-in-a-package design." [0]

Every mobile SOC does the same? All Intel SOCs do this? Which one? Can you point out the 16Gb of RAM in this Meteor Lake SOC?

https://images.anandtech.com/doci/20046/Meteor_Lake_Hotchips...

The Wikipedia article on Meteor lake doesn't even mention memory at all [1]

[0] https://en.wikipedia.org/wiki/Apple_M2#Memory

[1] https://en.wikipedia.org/wiki/Meteor_Lake


It's a board space and cost saving measure but it does not change performance. The tooling is also expensive and Intel have their own internal mature packaging processes.

The drams on an apple chip are still bog standard lpddr. Most benchmarks find the actual memory middle of the road at best.

Critically they aren't magically on the die or any more inside the package than most other high end mobile chips.


1. "It's not in a package, stop spreading the myth"

2. "It is in a package like no other vendor, but it's not changing performance"

3. ???


It's not packaged materially differently from the other chips it's compared against. Which is what I said originally.


Have you ever seen M1 or M2 chip? here you go https://eandt.theiet.org/content/articles/2022/09/teardown-a... and M2 pro https://www.ifixit.com/News/71442/tearing-down-the-14-macboo...

ram is ordinary POP, you got lied to by Apple marketing. If you acted on this marketing and spend money then re-programming will be very difficult with brain actively fighting on every step to prevent cognitive dissonance.


https://www.anandtech.com/show/17024/apple-m1-max-performanc...

It is cool to live in the future where 243 GB/s is middle of the road.

It is still impressive that Apple pulled it off 2 years ago, IMO.


This is what mobile SoCs use. https://en.m.wikipedia.org/wiki/Package_on_a_package If trace length was a big factor surely PoP would offer even greater improvement.

Anyway the point is, this is not a meaningful performance benefit as it's still just off the shelf LPDDR5. In fact the M SoCs tend to underperform in memory latency tests.


Yes, they use one package on another, but not one package.

"Anyway the point is, this is not a meaningful performance benefit"

Do you have a benchmark to read? This "Still LPDDR5" is hand waving.




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