> Interestingly the Pi 5 has moved most I/O like Ethernet, USB, MIPI and GPIO into a custom I/O controller chip called the RP1.
For cost-saving reasons, the I/O is located in the RP1 Southbridge (which has a larger process size) instead of the SoC. I had the opportunity to preview the Pi5 and have provided a detailed breakdown of the RP1's components [1]. In summary, what I/O functionalities does the RP1 manage? Essentially, it handles almost all of them.
For cost-saving reasons, the I/O is located in the RP1 Southbridge (which has a larger process size) instead of the SoC. I had the opportunity to preview the Pi5 and have provided a detailed breakdown of the RP1's components [1]. In summary, what I/O functionalities does the RP1 manage? Essentially, it handles almost all of them.
[1] https://youtu.be/q_QPM9xV_sw?si=dq-EEUp2u05-KrhM&t=252