I would use VHDL-2008, but freely admit, it's more difficult and complex than Verilog. My reason for this choice is that you can do physical design in VHDL, since attributes are part of the language, and not grafted into pragmas like Verilog. This lets you do weird shit like designing physically placed ring oscillators and self-timed logic. Verilog can do it too, but only with major limitations. I wrote a recursive VHDL block to multiply a constant real number by a bit_vector, and it synthesizes wonderfully, complete with full pipelining. I used that to make a color space converter from RGB to YUV with full double precision coefficients, with the data path being any width I want. I doubt this can be done in Verilog. SystemVerilog can do it though.

what are good VHDL learning resources for a newbie? thinking about using a lattice ECP5 in a design. primarily interested in using a risc V core to load files from an sd card and then do all realtime processing as programmable logic rather than on the risc V.

Google had a really interesting talk on their experiences with Chisel in designing the first Edge TPU chip. A lot of the issues are specific to industrial chip design, where verification and coverage are essential, but many would apply to small-scale personal designs as well. A good overview of the advantages as well as the problems. And many of the problems would apply to other front ends, which are essentially using Verilog as the target language.

https://www.youtube.com/watch?v=x85342Cny8c

Why not Haskell for FPGAs?

https://clash-lang.org/