Only to a point. Certainly not at 5nm. That's too advanced and power-inefficient.
5nm is extremely inefficient to make: IIRC, you need to submerge the parts in ultra-pure water and blast it with a ultraviolet laser to get down to 5nm. This is because even ultra-pure filtered air has too many particles that disperses the laser that you're off by a few nanometers... ruining the design. Filtering all that water and powering ultraviolet-spectrum lasers is extremely high power / electricity usage.
In contrast, a 40nm process is still airborne. You can largely do 40nm with "more standard" equipment. No ultra-pure water needed. No ultraviolet lasers. No quad-patterning. You can use "regular" light, with "regular cleanroom air", and "regular" processes to make the design at far, far lower costs (or at least, with less electricity).
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IIRC, the "ideal" cost-efficiency moving forward is to rebuild our older fabs for 300mm wafers, standardize upon that wafer size. Older fabs were standardized on smaller 200mm wafers with only ~45% area of the bigger wafers (and less in practice, because the edge of a wafer has all sorts of inefficient issues involved).
There's also the issue that a lot of these designs, such as Power MOSFETs, are... just one, maybe two, transistors. If your transistor is like a centimeter in size, there's no point using 5nm or 40nm or even 90nm nodes on it. There's just much much cheaper ways to fabricate a "centimeter-sized" MOSFET. There's all sorts of application of "chips", from 1-transistor Power MOSFETs to ~100 transistor op-amps, to ~10,000 transistor transceivers, to 10-million+ transistor NAND-Flash arrays. (1 Megabyte isn't much these days though, lol)
5nm is extremely inefficient to make: IIRC, you need to submerge the parts in ultra-pure water and blast it with a ultraviolet laser to get down to 5nm. This is because even ultra-pure filtered air has too many particles that disperses the laser that you're off by a few nanometers... ruining the design. Filtering all that water and powering ultraviolet-spectrum lasers is extremely high power / electricity usage.
In contrast, a 40nm process is still airborne. You can largely do 40nm with "more standard" equipment. No ultra-pure water needed. No ultraviolet lasers. No quad-patterning. You can use "regular" light, with "regular cleanroom air", and "regular" processes to make the design at far, far lower costs (or at least, with less electricity).
---------
IIRC, the "ideal" cost-efficiency moving forward is to rebuild our older fabs for 300mm wafers, standardize upon that wafer size. Older fabs were standardized on smaller 200mm wafers with only ~45% area of the bigger wafers (and less in practice, because the edge of a wafer has all sorts of inefficient issues involved).
There's also the issue that a lot of these designs, such as Power MOSFETs, are... just one, maybe two, transistors. If your transistor is like a centimeter in size, there's no point using 5nm or 40nm or even 90nm nodes on it. There's just much much cheaper ways to fabricate a "centimeter-sized" MOSFET. There's all sorts of application of "chips", from 1-transistor Power MOSFETs to ~100 transistor op-amps, to ~10,000 transistor transceivers, to 10-million+ transistor NAND-Flash arrays. (1 Megabyte isn't much these days though, lol)