This is really clever, but it seems "obvious" in the sense that it must have been attempted before, right?
> LightPC matches the performance of DRAM by minimizing the internal volatile memory components from non-volatile memory, exposing the non-volatile memory (PRAM) media to the host, and increasing parallelism to service on-the-fly requests as soon as possible.
If it really does match the performance of DRAM, then this seems huge. Surely it can't be true? Maybe it's only true for small amounts of memory?
There's plenty of previous work on NVM as main memory. This looks like an incremental improvement. All real NVM chips I'm aware of are slower than DRAM so the only way to match DRAM performance would be to use more chips which has packaging considerations.
NVM is mostly theoretical since XPoint is mediocre and nothing else is available.
My prediction is that this tech will remain an unviable experiment. Until Apple just goes ahead and integrates it into the M3 chip at which point everyone on Hackernews will have to have one.
It would have sufficed to provide just enough battery or capacitor to copy from regular RAM to non-volatile storage in case of a power drop. For reliability, you just need to ensure stuff is charged up again, on startup, before resuming.
The point of NVM is to be NV. A few GB of DRAM for cache and a super-capacitor would not increase cost notably, but would eliminate any performance impact, and also give a more reliable recovery.
> LightPC matches the performance of DRAM by minimizing the internal volatile memory components from non-volatile memory, exposing the non-volatile memory (PRAM) media to the host, and increasing parallelism to service on-the-fly requests as soon as possible.
If it really does match the performance of DRAM, then this seems huge. Surely it can't be true? Maybe it's only true for small amounts of memory?