I've absolutely heard storage vendors talking about protecting just the FTL during power loss as PLP. You could have an FTL where any writes are atomic, but that gets in the way of throughput practically. The storage vendors don't seem to generally be on board that tradeoff except for 'industrial' branded SKUs that also make throughput tradeoffs anyway.
That's not necessarily true, it just comes down to the design. Apple seem to use a log-structured FTL which works great for performance and just requires a (very fast) log replay after a hard shutdown. You can see the syslog messages from the NVMe controller (via RTKit) talking about rebuilding the table when this happens.
Micron also talks about power loss resistant FTL design in their whitepaper, and although their older SSDs had caps, I think their recent ones mostly do away entirely.
The micron whitepaper you cited talks about how their higher tier strategy involves keeping enough capacitance around to write out the FTL, because it's DRAM copy is allowed to get out of sync when the write-cache is enabled.
> The hold-up circuitry also preserves enough time and energy to ensure that the FTL addressing table is properly saved to the NAND. This thorough amount of data protection not only ensures data integrity in unexpected power-loss events, but it also enables the system designer to leave the SSD’s write cache enabled, giving a significant advantage in data throughput speeds.
