Separate micro-op cache per core, and no hyperthreading, so ARM would seem better equipped to defend against this.

Good to know. This new era of aggressive hardware flaw exploitation has me motivated to leverage my mobility and flexibility to evade. I don't think I have a better strategy.

So ARM CPUs do have microcode after all?

Microcode != Using micro-ops.

Microcode has been around for half a century at least, much longer than micro-ops.

Uh. I thought that micro-ops were literally microcode instructions/operations?

In a modern processor they are however microcode as a general term is a catch-all term which basically means non-trivial configuration logic stored in somewhere not meant to be touched by people other than the vendor. I think IBM have millicode.

nanocode?