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vardump
on Nov 1, 2020
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An ex-ARM engineer critiques RISC-V
> I have written code where I took advantage of x86's ability to compute a+b*9 with a single instruction...
Didn't check, but I suspect that decodes at least into two microinstructions.
pbsd
on Nov 1, 2020
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Not only is it a single uop for the last 10 years of Intel chips, you can also run 2 of them per cycle.
pizlonator
on Nov 1, 2020
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I’m assuming a is a constant in your example and that you’re doing a(b, b, 8). That’s one cycle on modern intels I believe (I think the manual promised this for Nehalam). OP also alludes right this fact when talking about fusion.
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Didn't check, but I suspect that decodes at least into two microinstructions.