Async design is basically snake oil AFAIK that's only produced cores in the 10Ks of gates.
And there's still benefits to lower speed sections as there's physical differences to the transistors to emphasize power consumption of switching speed that'd still continue into async designs.
On top of that, part of what we're seeing is dark silicon and the specifics of Dennard scaling. You can't light up the whole chip and not melt the chip, so you're going to see mobile TDP chips where you turn half the chip on or off at a time either way.
Thank you for that, had somewhat overlooked the aspect of parts not used would in effect be shifting heatsinks and the whole big/little does in many ways give you whole easily controlled area's which for multi core designs can work well.
But biggest issue with any adoption of growth in asyn design is the tools and skills to do such work. Though it does prove hard to compare and most of the development in the async area been driven by the EM advantages for space based usage.
And there's still benefits to lower speed sections as there's physical differences to the transistors to emphasize power consumption of switching speed that'd still continue into async designs.
On top of that, part of what we're seeing is dark silicon and the specifics of Dennard scaling. You can't light up the whole chip and not melt the chip, so you're going to see mobile TDP chips where you turn half the chip on or off at a time either way.