> there's No Such Thing as Knowing Your Computer 'All the Way to the Bottom'
NAND to Tetris (www.nand2tetris.org) seems like a pretty good take on the concept.
Another one is Wirth's Oberon system, which runs on Wirth's TRM/RISC architecture, which is simple enough for students to implement in Verilog (or another HDL such as VHDL or Wirth's Lola) and compile to an FPGA.
MIPS is also simple enough to implement in Verilog over the course of an academic term and also has good tool support for languages like C and C++.
Personally I find understanding low-level system behavior to be interesting, fun, and helpful for understanding many irritating application behaviors (often errors and slowdowns) which are caused by interactions with the OS and hardware.
NAND to Tetris (www.nand2tetris.org) seems like a pretty good take on the concept.
Another one is Wirth's Oberon system, which runs on Wirth's TRM/RISC architecture, which is simple enough for students to implement in Verilog (or another HDL such as VHDL or Wirth's Lola) and compile to an FPGA.
MIPS is also simple enough to implement in Verilog over the course of an academic term and also has good tool support for languages like C and C++.
Personally I find understanding low-level system behavior to be interesting, fun, and helpful for understanding many irritating application behaviors (often errors and slowdowns) which are caused by interactions with the OS and hardware.