I used EDK II framework. About the keyboard input, Program reads the value from 0x60 port directly because of multi-key input processing. I measure the timer count twice(for 1sec) by using the rdtsc instruction to make game delay more accurate. I didn't implement the audio output.
Yeah, it would be awesome to have this open-source, with the help of the community one can achieve great things.
There was this project for FirefoxOS to support J2ME apps -- https://github.com/mozilla/pluotsorbet It would be great to have something like that for "nostalgic" reasons. Many feature phones' users remember J2ME apps, games especially, very fondly. Check out also this J2ME project, which could potentially be ported to KaiOS as well: https://github.com/XerTheSquirrel/SquirrelJME
Also, have you considered some kind of support for "content blocking" (like in iOS, or in the form of typical browser plugin-ins), of course, I'm not saying that ANY content should be blocked by default. But taking into account that devices with KaiOS wouldn't be very powerful, it could be really useful to have such an option to avoid "unnecessary" stuff when browsing the Internet...
"Dissecting FPGAs from bottom up, extracting schematics and documenting bitstream formats
Event large
In this talk I describe the basic makeup of FPGAs and how I reverse engineered the Xilinx 7 Series and Lattice iCE40 Series together with the implications.
FPGAs are used in many applications ranging from networking, wireless communications to high performance computing, ASIC prototyping and so forth.
They would be perfect to create true open source hardware but we would still be bound to use proprietary toolchains provided by the manufacturers.
To generate a valid configuration file this toolchain needs to know every single wire, switch, possible connection, logic block and the corresponding bits to configure each them.
In other words you are required to have the blueprints of the FPGA in your toolchain to be able to do the place&routing and generation of the bitstream file from your netlist.
Naturally manufacturers do not like to disclose this information, possibly because someone could reverse engineer valuable intellectual property cores.
I will explain each component used in FPGAs from Lattice and Xilinx, like switchboxes, the interconnect, logic blocks, memory blocks.
Furthermore I will talk about how I reverse engineered the 7 Series from Xilinx and the iCE40 from Lattice.
At the end I will demonstrate how to create your own bitstream by hand, implementing a small logic circuit and testing it live on a Zynq 7000 FPGA from Xilinx."
This reminds me of the MEGA65 project (http://mega65.org/). They're making a beefed-up version of the Commodore 64, and here we have a ZX Spectrum on steroids.
Important message from the project maintainer, shlomif:
"Hi all! To facilitate coordination about contributing to PySol, please join me for a real time Internet chat on ##pysol on Freenode (note the double octothorpe) . I am usually "rindolf" there with a fallback "shlomif" nickname. We may set up chat rooms on different services in the future."
